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Theory and Fabrication of Integrated Circuits University of Illinois at Urbana-Champaign logo HOME ·
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Students performing oxidation
Integrated Circuit Cells
Logic gates
Logic Gates
NAND
The NAND has two drivers in series, each 200 x 20 μm. The load is 10 x 40 μm. This results in ΒR of 20.
NOR
The NOR has two drivers in parallel, each 100 x 20 μm and a load transistor of 10 x 40 μm. This results in ΒR of 20.
Large Ring Oscillator
The large ring oscillator is designed using the standard design rules. Therefore, if most of your devices work, it should work also. The drivers' gate length and width are 20 and 100 μm, respectively. The loads' gate lengths and widths are 40 and 10 μm, respectively.
Small Ring Oscillator
The small ring oscillator is designed with much lower tolerances. Misalignment must not exceed 7.5 μm between any two layers. The drivers' gate length and width are 10 and 50 μm, respectively. The load's gate lengths and widths are 20 and 5 μm, respectively.
For Additional Information Consult:
- John P. Uyemura, Fundamentals of MOS Digital Integrated Circuits, (Addison- Wesley, Reading, MA, 1988).
- Edward S. Yang, Microelectronic Devices, (McGraw-Hill, New York, 1988).
Devices
Integrated Circuit Cells
LASI was used for mask layout.
The mask set is currently under revision 1998: Dane Sievers, which is a minor redesign of revision 1994: Ron Stack. All revisions are based on the work of revision 1991: Kevin Tsurutome.
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