ECE582

Physical VLSI Design

Spring 2012


Instructor

Prof. Martin D.F. Wong ( mdfwong@illinois.edu)

Office

409 CSL

Phone

244-1729

Office Hours

After class or by appointment

Course Outline:

Partitioning

Floorplanning

Placement

Routing

Interconnect Optimization

Signal Integrity Issues

FPGAs

Others

Grading Scheme:

Project 50%

Presentation 20%

Exams 30%

Project:

Description

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